123

Micro-Electronics Engineer (ESA-ESTEC)

Noordwijk, The Netherlands, Sapienza Consulting

[1359]
Field(s) of expertise
Aerospace Engineering Electronics Engineering
Job type
Permanent
Education
Master
Deadline
29/06/2020

About this job

We are recruiting a Micro-Electronics Engineer for Sapienza to work on our Customers Site (ESA-ESTEC). The incumbent will provide technical support to ESA projects in the domain of Field Programmable Gate Array (FPGA) used in payloads and platforms of ESA missions of any ESA programme: Navigation, Science, Earth Observation, Telecommunications, Human Space Exploration or Technology.

Responsibilities

  • Provision of VLSI (ASIC & FPGA) technical expertise to Projects involving requirements analysis, performance, and budgets analysis, writing and assessment of VLSI specifications; review, evaluation and checking of industrial contractor’s VLSI designs. Identification of design deficiencies and problem areas and proposals for their solutions.
  • Support ASIC and/or FPGA technology developments for R&D and /or projects, supervising that good design practices and manufacturing and test methodologies are applied. In addition, independent verification (through code inspection, simulation, and timing analysis) and validation (through HW tests) will have to be carried out for some ASIC and FPGAS developments.
  • Design, analysis, verification of VLSI systems for control and data processing applications, and/or signal processing using industrial standard tools, hardware description and programming languages.
  • Supervision of the end-to-end development of new FPGAs throughout all the development phases: specification, architectural design, detailed design, place and route, programming, and device tests
  • Critical review of the technical documentation, design files, hardware test platforms and software used during the different phases of the FPGA developments
  • Providing technical feedback and advice to ESA and industry mission teams to help achieve successful and on-time/on-budget new FPGA developments and to solve problems related to already developed FPGAs
  • Leading and/or providing support to research internal (in ESTEC Microelectronics Laboratory) and/or external (with companies contracted by ESA) activities in the domain of FPGAs devices and their tool ecosystems for use in space environment
  • Design and test of digital FPGAs (specifications, block design, top level integration, design for test, pre and post layout simulation and timing analysis, gates synthesis, support during layout, prototype test and in system validation), with proficiency in HDL (VHDL, Verilog and System-C).
  • VLSI IC Design CAD tools such as: Synopsys, CADENCE, Mentor, Mathlab and/or Simulink.
  • FPGA HW and SW of several vendors such as: Xilinx, Microchip (former Microsemi, former ACTEL), NanoXplore, Altera and/or Atmel
  • Preparation of FPGA test-benches, for functional validation and electrical characterization, using signal generators, oscilloscopes, and signal analyzers.
  • Basic system administration in UNIX and Windows for IC Design CAD tools.
  • Act as the activity technical responsible, maintain interfaces with the prime contractors, participate in progress meetings and reviews, as requested, and provide appropriate feedback on the achieved progress and discussions.
  • Interface with ESA’s project teams, the prime and lower level contractors, participate in progress meetings and reviews, as requested by project work, and provide appropriate feedback on the achieved progress and discussions.

Profile

  • Master’s Degree in Engineering/Physics, specialized in Microelectronics or relevant
  • At least 04 years of relevant work experience
  • Experience in the design of complex microelectronics systems, and familiarity with Industry standard VLSI/ASIC/FPGA CAD tools (e.g. CADENCE, SYNOPSYS, MENTOR, MATLAB, SPW) etc. as well as hardware description languages (VHDL and/or Verilog HDL, SystemC) is essential.
  • Being familiar with the Space applications of microelectronics and having knowledge of Space environment and quality requirements will be an important asset, but it is not mandatory.
  • Experience with using third party Intellectual Property (IP) designs (in VHDL and/orSystemC) is a requirement.
  • Experience working with ASIC technology will be a valued extra asset. The work to be done, however, will be for FPGA and not ASICs
  • Experience with Microprocessors (e.g. LEON, ARM, RISC-V) and HW-SW co-design.
  • Experience with mitigation of radiation effects and/or radiation tests of FPGAs and/or ASICs.
  • Experience with digital ASIC design.
  • Knowledge of the Space environment, its effects on microelectronics devices and related technology, as well as ECSS quality standards applied to space VLSI ICs.
  • Fluent in English; knowledge of another ESA member-state language is an asset

 

Contact:

Candidates must be eligible to work in the EU

Please send your CV (in English) as soon as possible, but no later than 29/06/2020 to jobs@sapienzaconsulting.com

 

———

For information on how we process the personal data in your application, please see the Sapienza Privacy Statement here.