Responsibilities

Be a part of a world-class team in developing the next generation of satellite communication phased array systems. The RFIC team will develop a MIMO RFIC chips for cm-Wave frequency range.

As an RFIC designer you will:

• Own a full RFIC block from preliminary design to post Tape out ( e.g : Transmit path, Rx Path, LO generation )
• Be a part of the system architecture definitions and RFIC spec definition
• Consider and propose alternative implementation topologies, taking into account aggressive performance and power consumption requirements
• Lead the layout implementation of the block and perform post-extraction simulations
• Participate in top level integration and optimization of the full chip

Profile

Qualifications:

3+ years of industry experience in analog and/or RFIC design.

Experience in design of multiple RFIC blocks from initial stage to Tape Out, preferable CMOS. Solid understanding of the design details, tradeoffs, and alternatives of at least one of the following topics:

• PLL or clock generation circuitry
• RFIC PA/LNA/Mixer/Filters/VGAs/detectors
• Bias and sensors bandgap, LDO, thermal and voltage sensors

Familiarity with the following tools:

• Cadence ADE
• EM environment (HFSS, CST, Momentum)
•  Preferably MATLAB/ Octave or other Mathematical cad tool.

Personal skills:

• Independent problem solving
• Awareness of schedule and priorities
• Team work, being businesslike, work as a team and modest in attitude
• Willingness to accept alternative ideals and ‘can do’ attitude.
• MSc. Or above in Electrical Engineering or equivalent experience

We are a company that promote a risk aware culture, ensure efficient and effective risk and compliance management practices by adhering to required standards and processes